"Science and Technology Board Daily" February 22 (Editor Zheng Yuanfang) On the ISSCC 2024 held from February 18th to 22ndNew technology.
ISSCC full name is International Solid-State Circuits Conference. It is the highest level meeting"Chip Olympic Conference" in the field of circuit design.
At this conference this year, TSMC introduced the new generation of packaging technology for for high performance calculations and AI chips. Based on the existing 3D packaging, based on the existing 3D packaging,It also integrates silicon optical technology to improve the effect of interconnection and reduce power consumption .
According to Zhang Xiaoqiang, senior vice president of TSMC business development, This technology aims to help encapsulate more HBM and Chiclet small chips to improve the performance of AI chips Essence
As far as the current situation is concerned, if you want to add more HBM and Chiclet small chips, you must add more components and IC loads, which may lead to connection and energy consumption.Question -therefore, silicon optical technology is needed.
This packaging technology of TSMC, through silicon optical technology to replace traditional I/O circuits to transmit data.Not only that, in the packaging architecture, the heterogeneous chip is stacked on the top of the basic chip, and the mixing key is used to maximize the I/O performance.
Figure | The new generation is used for high-performance calculation and AI chip packaging technology platform
Figure| Currently used for high -performance computing and AI chip packaging technology platform
In the new generation of packaging technology platform schematic diagram, CPO also appeared.Zhang Xiaoqiang pointed out that silicon light is the best choice for CPO.
In addition, Zhang Xiaoqiang said that the most advanced chip today can accommodate up to 100 billion crystal pipes, but has advanced 3D packaging technologyIt can be extended to a single chip containing 1 trillion transistors .
TSMC did not disclose the specific commercialization time of the new generation of packaging technology.
But it is worth noting that since last year, TSMC has frequently spread the movement of silicon light and CPO.
In September 2023, there was news that TSMC and Broadcom, British, and other large customers jointly develop new products such as silicon light and CPO optical components, as soon as the second half of 2024Start us to usher in a large order, and it is expected to enter the mass output stage in 2025 .
At that time, people in the industry revealed that TSMC is expected to introduce silicon optical technology into the CPU, GPU and other computing processes in the future.It is dozens of times of the existing processor .
And the Vice President of TSMC publicly stated publicly that If you can provide a good "silicon light integration system", you can solve the two key issues of energy consumption and AI computing power"This will be a new model. We may be at the beginning of a new era."
Industry analysis states that high -speed data transmission is still inserted and unplugged.Optical components, with the rapid progress of the transmission speed and entering the 800G era, and the future, it will usher in higher transmission rates such as 1.6T to 3.2T. Power loss and heat dissipation management problems will be the biggest problem.The solution launched by the semiconductor industry is to integrate silicon optical elements and exchangers ASIC into a single -mode group through CPO packaging technology. This solution has begun to obtain large factories such as Microsoft and META and adopts a new generation of online architecture.Essence
