from the front Silicon Valley artificial intelligence chip startup Tenstorrent, which was co-founded by senior people such as Intel, recently announced that it has reached an important agreement with the Japanese government.According to the agreement, Tenstorrent will train up to 200 chip designers for Japan in the next five years.
This AI chip startup founded in 2016, which has attracted much attention because it brings together many industry elites.Among them, Jim Keller, the chip god, known as the "Silicon Fairy", serves as the companys CEO . He led a , etc.The talent chip design team of technology giants is committed to promoting the innovation and development of AI chip technology.
The total amount announced on Tuesday is $ 50 million, which will be allocated between Tenstorrent and the Japanese advanced semiconductor technology center.This is part of Japans efforts to revitalize its semiconductor industry.The country controlled half or more of the global chip market in the 1980s, but now it only accounts for less than one -tenth.
The core of Japans efforts is Rapidus, which is a contract chip manufacturer supported by billions of dollars in government.Advanced semiconductor and began large -scale production before 2027.However, to succeed, the Rapidus factory needs to find customers who are willing to create chip design in its factory.
The agreement reached this time aims to cultivate these future customers.Tenstorrent collaborated with Rapidus last year to develop a design that can be manufactured in its factory, and the plan to bring Japanese engineers to the US office aims to spread relevant knowledge to the chip industry in Japan.
Tenstorrent chief customer official David Bennett said in an interview with Reuters: "I think Japanese actions and investment have clearly stated that they want to better control themselves betterThe future.Holdings senior person, Ishii Paul, designed AI chips together.
Although TenStorrent still retains the chip blueprint for the process design, it will use an open source RISC-V instruction set architecture, so that the Japanese engineer can design its own RISC-V design after returning to China to design its own RISC-V designEssence
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